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Press Releases  |  Events Using FPGAs in Telecom Processing Systems by Mark Wecht, Embedded Systems Design Enabling technologies, such as Linux, Gigabit Ethernet, TCP/IP, and advanced FPGAs, allow designers to build highly-scalable, distributed, non-proprietary, open-source systems for processing real-time streaming data in telecom applications. With the latest devices, one FPGA can often replace many RISC processors. Such a replacement not only lowers chip count and system complexity, but can also produce major savings in size, weight, and power consumption. Today developers can use FPGA fabric to create a system-on-an-FPGA (SoFPGA) tailored to specific processing requirements. Such designs typically contain processor cores with internal and external bus interfaces. The cores and interfaces may be hard or soft. External FPGA interfaces provide for single-ended and differential streaming data I/O and network connectivity. A typical SoFPGA telecom application might receive multiple input data streams, process them using dedicated FPGA material or processor cores, and forward the results over a high-speed network for subsequent processing and analysis. By combining SoFPGA processing nodes utilizing standard networking techniques, a developer can build a distributed, FPGA-based, telecom processing system. Today Gigabit Ethernet non-blocking switches with 500 or more ports are available from companies such as Foundry Networks and Cisco Systems. SoFPGA real-time processing nodes may be combined to form highly-scalable distributed systems to accelerate XML processing or to implement protocols such as PDH, SONET/SDH, DCME, or HDLC. FPGA fabric can perform most protocol processing in these systems. Software running on processor cores can assist the FPGA material and implement TCP/IP to move data and processing results between nodes via network connections. SoFPGA-based nodes can also be mixed with blade servers or other processing nodes to provide the desired capabilities. Developers do not need special knowledge of specific embedded operating systems to run Linux on the SoFPGA and blade server processing nodes. Cat-5 cables, Gigabit Ethernet, and TCP/IP network programming via "Stephens" provide an open architecture, non-proprietary, standards based, open source, well documented starting point for designing and prototyping specific applications. Distributed SoFPGA processing nodes may be configured via the network or by using a hardware infrastructure allowing FPGA configurations and processor core executables to be stored in and retrieved from non-volatile flash memory. For example, ESD's StreamBlade™ product family addresses these challenges by leveraging current FPGA technology to implement flexible high-performance solutions. The StreamBlade™ SOE-4 offers two Xilinx Virtex-4 FX60/100 FPGAs, four 10/100/1000 Ethernet ports, four 40-pin ATA connectors providing user-configurable access to both FPGAs, four 8MB banks of ZBT SRAM, and four 128MB banks of DDR2 SDRAM. Conclusion: Affordable FPGA-based real-time processing systems can be built using COTS FPGA fabric combined with industry standard networking technology. In most cases, Linux and TCP/IP are viable alternatives to COTS embedded operating systems. To take full advantage of FPGA technology's promise, our industry must focus on creating the tools that will allow for seamless hardware/software development and integration. Mark D. Wecht is the President of Embedded Systems Design (Elkridge, MD). You can reach him at mark.wecht@embedded-sys.com.		Software Defined Radio (SDR): ESD has significant expertise in the management and development of SDR systems. Range Extension: ESD has unique experience with range extension through interference mitigation with multi-sensor adaptive beam forming technologies. Data Distribution: ESD has extensive experience with the distribution and processing of real-time streaming data. Hardware and FPGA: ESD has experience with multi-layer printed circuit board design, FPGA design, CPLD design, million-plus gate ASIC design, and system-on-chip (SoC) architecture including SoFPGA.
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